Archive for the ‘Processors’ Category

by viagallery.com

processor upgrade

Image by Huro Kitty
i’m too cheap to buy a G5 and had too many problems with the powerbook, so i’ve upgraded my dual 533Mhz G4 digital audio to dual 1.6Ghz from Giga Designs. now i’m just waiting for the additional gig of ram and new hard drive to arrive on monday. yay hooray!

When buying a laptop one of the most important specifications is the notebook processor. Desktop processors are different from laptop processors because for them not only the performance counts, but also how much energy they consume.

What is a processor? A processor is like the brain of the Laptop. It does all the calculations necessary.  From starting the notebook, to surfing the web with a Browser, the Processor does all the thinking necessary. The better the processor is, the faster you can start programs.
A few years ago a fast processor was necessary for many programs to run properly. Nowadays almost every program will run even on the slowest CPU (other word for Processor). The difference between a normal and a fast processor is not very big for everyday use. Most people will hardly notice any difference, except that some programs may start a few seconds quicker. Only when doing heavy computing like Photoshop, or video encoding and playing the newest games a fast processor does make a difference. For laptop owners, the most important factor is how much power the CPU uses. The more Watt per hour it uses the faster the battery will be empty.

When you decide on what processor you want in your Laptop you have to think about 3 things.

Power usage:
The more Watt a processor uses, the faster the battery will die. Most CPUs are able to reduce their power usage on command. Under moderate usage, your processor will use only half the power. Also, as a general rule, the higher the performance of a processor the faster it empties the battery.
Performance:
A slow Processor can do everything a fast processor can do, it just takes longer. For most people the performance of the processor does not make a big difference. Only when you are playing the newest games, or encode videos you will notice a real difference between the processor speeds.
Price:
That one is obvious, when you are willing to pay extra you can expect a higher performance, but usually the power usage will also increase.
What is a good Processor?

For notebooks generally Intel processors have a better performance and use less power than AMD CPUs.

In the end it comes down, to what you want to do with your Laptop. If you want to use it on the go, take the lowest performance processor. If you will keep your notebook at home most of the time, take the best performance processor, you can afford.

How to read Processor information:

Until a few years ago there was a very simple rule to find out if the processor is fast or not. The rule was: the more GHz a processor had, the faster it was. Since about 2007 GHz are not very important anymore. Newer processors have two or 4 processors combined. It is like having to or four laptops in one chassis. This makes processors faster even when they have only 1 or 2 GHz. The only way to know if it is a fast CPU is to know what model series it belongs to.

Only if two CPUs are from the same model series you can say that the one with more GHz is actually faster.

Here is a short list of some popular Processors:

Intel® Atom™
Very low energy consumption, very slow, cheap
Intel® Core™2 Duo
medium to high energy consumption, fast (old models), expensive
Intel® Core™ i
medium to high energy consumption, very fast (new models), very expensive
AMD Turion™
medium energy consumption, fast, cheap
AMD Athlon™
lwo to medium energy consumption, fast, cheap
AMD Sempron™
medium energy consumption, slow, very cheap

A dual processor refers to a computer system that has two processors, which allows the computer to run more programs at the same time. Get a computer with a dual processor so that the computer will run faster and more efficiently using information from a certified computer technician in this free video on computer processors. Expert: Jonathan Ayres Bio: Jonathan Ayres has more than 25 years of computer industry experience with all types of computer hardware and operating systems. Filmmaker: Todd Green

Intel Core i5 Processor i5-650 3.20GHz 4MB LGA1156 CPU BX80616I5650

• 3.20GHz Intel Turbo Boost speed up to 3.46GHz
• Intel HD graphics included
• 2 cores 4 threads with Intel Hyper-Threading
• Socket LGA1156
• 73watt TDP

For the first time, there is a smart family of processors that can provide extra performance when you need it, and increased energy efficiency when you don’t. Intel Core i5 650 Processor 3.20 GHz with 4 MB L3 shared cache. Features Intel Turbo Boost Technology which accelerates your performance to match your workload. Intel Hyper-Threading Technology (dual-core with 4 threads), NEW with Intel HD Graphics at 733 MHz, LGA1156 package. Intel HD Graphics supported when used with DH55TC, DH55HC or similar motherboards. Included in box: processor, fan/heatsink, manual and chassis sticker. 3 Year Limited Warranty. Intel Turbo Boost Technology- automatically speeds up your processor when you need it. So even if you’re running multiple applications at the same time, turbo boost taps any unused power to give you an extra boost of speed. Like a modern sports car, where the car can deliver power and traction to the wheels where they’re needed, Intel Turbo Boost Technology automatically speeds up the processor when the PC needs extra performance. Intel Hyper-Threading Technology – lets your processor do two things at the same time, similar to a toaster that has two slots instead of one, or four slots instead of two. The result is that you can do a lot more in less time. Intel HD Graphics- provides superb visual performance for sharper images, richer color and lifelike video. Now available on select models of the all NEW 2010 Intel Core Processor Family.The Intel Core i5-650 Processor brings great performance, Intel HD Graphics, and the latest Intel technologies to your desktop computer. With two cores running at 3.2 GHz, the Core i5-650 won’t have any problems handling your everyday applications. And when you need an extra burst of speed, the processor can utilize Intel Turbo Boost Technology to run at up to 3.46 GHz.

Intel Core i5-650 features: Two 3.2 GHz cores for better multitasking and multithreaded performance. Turbo Boost Technology boosts core to 3.46 GHz when needed. Integrated Intel HD Graphics. 4 MB of Intel Smart Cache. Advanced security technologies such as Intel Trusted Execution Technology.

The Intel Core i5-650 processor delivers outstanding performance at a great price. View larger.

Multiple Cores for Speedy, Multi-Threaded Performance
The Intel Core i5-650 contains two processors, or execution cores, on one integrated circuit. Combined with four threads, the Core i5-650 can simultaneously work on multiple tasks. This design produces faster and more efficient results, so your computer won’t slow down–no matter how many applications you have open.

Turbo Boost Technology Gives Extra Speed When You Need It
Intel Turbo Boost Technology automatically oversees your workload, redirecting power and moderating performance for better efficiency. In the past, unused portions of a chip would be turned off, leaving some cores idle. But with Turbo Boost Technology, unused performance is now routed to active cores, boosting performance without wasting power. With Turbo Boost enabled, the Intel Core i5-650 Processor accelerates from its usual 3.2 GHz up to a maximum single-core frequency of 3.46 GHz.

Hyper-Threading for Better Efficiency
The Intel Core i5-650 Processor features Intel Hyper-Threading Technology to deliver more efficient use of resources and better performance on multithreaded software. You’ll be able to run demanding desktop applications, such as music and movie creation applications, while running background applications, such as virus protection software, and still maintain system responsiveness.

Large Smart Cache for Better Media Performance
Intel Smart Cache provides performance-maximized storage for frequently accessed data. The Intel Core i5-650 has a generous 4 MB of Intel Smart Cache kept close to the processor, so there’s always data feeding in. The result is better overall functionality for everyday applications and markedly improved performance for rich media titles and games.

Intel HD Graphics Built-in
With the Core i5-650, Intel HD Graphics is built right into the CPU, so you won’t have to spend money on a discrete graphics card in order to get stunning results. Intel HD Graphics provides sharp images, rich color, and lifelike audio and video. Intel HD Graphics support multiple monitors, premium video such as Blu-ray Disc playback and mainstream gaming as well as a full Windows 7 experience., The Core i5-650 has a graphics core that runs at 733 MHz to maximize viewing power.

Advanced Technology to Keep Your Computer Secure
The Intel Core i5-650 has security features that make it ideal for business use. Intel Trusted Execution Technology provides a hardware-based set of extensions that enhance security capabilities, protecting your computer against software-based attacks and protecting the confidentiality and integrity of data stored on your clients’ PCs.

The Intel Core i5-650 is made on a 32nm manufacturing process for better energy efficiency. It uses the LGA1156 socket and is backed by a three-year limited warranty.

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by viagallery.com

Introduction

One of the Pentium(r) Pro processor’s primary goals was to significantly exceed the performance

of the 100MHz Pentium(r) processor while being manufactured on the same semiconductor process. Using the same process as a volume production processor practically assured that the Pentium Pro processor would be manufacturable, but it meant that Intel had to focus on an improved microarchitecture for ALL of the performance gains. This guided tour describes how multiple architectural techniques – some proven in mainframe computers, some proposed in academia and some we innovated ourselves – were carefully interwoven, modified, enhanced, tuned and implemented to produce the Pentium Pro microprocessor. This unique combination of architectural features, which Intel describes as Dynamic Execution, enabled the first Pentium Pro processor silicon to exceed the original performance goal.

Building from an already high platform

The Pentium processor set an impressive performance standard with its pipelined,

superscalar microarchitecture. The Pentium processor’s pipelined implementation uses five

stages to extract high throughput from the silicon – the Pentium Pro processor moves to a

decoupled, 12-stage, superpipelined implementation, trading less work per pipestage for

more stages. The Pentium Pro processor reduced its pipestage time by 33 percent, compared

with a Pentium processor, which means the Pentium Pro processor can have a 33% higher clock

speed than a Pentium processor and still be equally easy to produce from a semiconductor

manufacturing process (i.e., transistor speed) perspective.

The Pentium processor’s superscalar microarchitecture, with its ability to execute two

instructions per clock, would be difficult to exceed without a new approach.

The new approach used by the Pentium Pro processor removes the constraint of linear

instruction sequencing between the traditional “fetch” and “execute” phases, and opens up

a wide instruction window using an instruction pool. This approach allows the “execute”

phase of the Pentium Pro processor to have much more visibility into the program’s

instruction stream so that better scheduling may take place. It requires the instruction

“fetch/decode” phase of the Pentium Pro processor to be much more intelligent in terms of

predicting program flow. Optimized scheduling requires the fundamental “execute” phase to

be replaced by decoupled “dispatch/execute” and “retire” phases. This allows instructions

to be started in any order but always be completed in the original program order. The

Pentium Pro processor is implemented as three independent engines coupled with an

instruction pool as shown in Figure 1 below.

What is the fundamental problem to solve?

Before starting our tour on how the Pentium Pro processor achieves its high performance it

is important to note why this three- independent-engine approach was taken. A fundamental

fact of today’s microprocessor implementations must be appreciated: most CPU cores are not

fully utilized.

The first instruction in this example is a load of r1 that, at run time, causes a cache miss.

A traditional CPU core must wait for its bus interface unit to read this data from main

memory and return it before moving on to instruction 2. This CPU stalls while waiting for

this data and is thus being under-utilized.

While CPU speeds have increased 10-fold over the past 10 years, the speed of main memory

devices has only increased by 60 percent. This increasing memory latency, relative to the

CPU core speed, is a fundamental problem that the Pentium Pro processor set out to solve.

One approach would be to place the burden of this problem onto the chipset but a

high-performance CPU that needs very high speed, specialized, support components is not a

good solution for a volume production system.

A brute-force approach to this problem is, of course, increasing the size of the L2 cache to reduce the miss ratio. While effective, this is another expensive solution, especially considering the speed requirements of today’s L2 cache SRAM components. Instead, the Pentium Pro processor is designed from an overall system implementation perspective which will allow higher performance systems to be designed with cheaper memory subsystem designs.

Pentium Pro processor takes an innovative approach

To avoid this memory latency problem the Pentium Pro processor “looks-ahead” into its instruction pool at subsequent instructions and will do useful work rather than be stalled. In the example in Figure 2, instruction 2 is not executable since it depends upon the result of instruction 1; however both instructions 3 and 4 are executable. The Pentium Pro processor speculatively executes instructions 3 and 4. We cannot commit the results of this speculative execution to permanent machine state (i.e., the programmer-visible registers) since we must maintain the original program order, so the results are instead stored back in the instruction pool awaiting in-order retirement. The core executes instructions depending upon their readiness to execute and not on their original program order (it is a true dataflow engine). This approach has the side effect that instructions are typically executed out-of-order.

The cache miss on instruction 1 will take many internal clocks, so the Pentium Pro processor core continues to look ahead for other instructions that could be speculatively executed and is typically looking 20 to 30 instructions in front of the program counter. Within this 20- to 30- instruction window there will be, on average, five branches that the fetch/decode unit must correctly predict if the dispatch/execute unit is to do useful work. The sparse register set of an Intel Architecture (IA) processor will create many false dependencies on registers so the dispatch/execute unit will rename the IA registers to enable additional forward progress. The retire unit owns the physical IA register set and results are only committed to permanent machine state when it removes completed instructions from the pool in original program order.

Dynamic Execution technology can be summarized as optimally adjusting instruction execution by predicting program flow, analysing the program’s dataflow graph to choose the best order to execute the instructions, then having the ability to speculatively execute instructions in the preferred order. The Pentium Pro processor dynamically adjusts its work, as defined by the incoming instruction stream, to minimize overall execution time.

Overview of the stops on the tour

We have previewed how the Pentium Pro processor takes an innovative approach to overcome a key system constraint. Now let’s take a closer look inside the Pentium Pro processor to understand how it implements Dynamic Execution. Figure 3 below extends the basic block diagram to include the cache and memory interfaces – these will also be stops on our tour. We shall travel down the Pentium Pro processor pipeline to understand the role of each unit:

•The FETCH/DECODE unit: An in-order unit that takes as input the user program instruction stream from the instruction cache, and decodes them into a series of micro-operations (uops) that represent the dataflow of that instruction stream. The program pre-fetch is itself speculative.

•The DISPATCH/EXECUTE unit: An out-of-order unit that accepts the dataflow stream, schedules execution of the uops subject to data dependencies and resource availability and temporarily stores the results of these speculative executions.

•The RETIRE unit: An in-order unit that knows how and when to commit (“retire”) the temporary, speculative results to permanent architectural state.

•The BUS INTERFACE unit: A partially ordered unit responsible for connecting the three internal units to the real world. The bus interface unit communicates directly with the L2 cache supporting up to four concurrent cache accesses. The bus interface unit also controls a transaction bus, with MESI snooping protocol, to system memory.

Tour stop #1: The FETCH/DECODE unit.

Let’s start the tour at the Instruction Cache (ICache), a nearby place for instructions to reside so that they can be looked up quickly when the CPU needs them. The Next_IP unit provides the ICache index, based on inputs from the Branch Target Buffer (BTB), trap/interrupt status, and branch-misprediction indications from the integer execution section. The 512 entry BTB uses an extension of Yeh’s algorithm to provide greater than 90 percent prediction accuracy. For now, let’s assume that nothing exceptional is happening, and that the BTB is correct in its predictions. (The Pentium Pro processor integrates features that allow for the rapid recovery from a mis-prediction, but more of that later.)

The ICache fetches the cache line corresponding to the index from the Next_IP, and the next line, and presents 16 aligned bytes to the decoder. Two lines are read because the IA instruction stream is byte-aligned, and code often branches to the middle or end of a cache line. This part of the pipeline takes three clocks, including the time to rotate the prefetched bytes so that they are justified for the instruction decoders (ID). The beginning and end of the IA instructions are marked.

Three parallel decoders accept this stream of marked bytes, and proceed to find and decode the IA instructions contained therein. The decoder converts the IA instructions into triadic uops (two logical sources, one logical destination per uop). Most IA instructions are converted directly into single uops, some instructions are decoded into one-to-four uops and the complex instructions require microcode (the box labeled MIS in Figure 4, this microcode is just a set of preprogrammed sequences of normal uops). Some instructions, called prefix bytes, modify the following instruction giving the decoder a lot of work to do. The uops are enqueued, and sent to the Register Alias Table (RAT) unit, where the logical IA-based register references are converted into Pentium Pro processor physical register references, and to the Allocator stage, which adds status information to the uops and enters them into the instruction pool. The instruction pool is implemented as an array of Content Addressable Memory called the ReOrder Buffer (ROB).

We have now reached the end of the in-order pipe.

Tour stop #2: The DISPATCH/EXECUTE unit

The dispatch unit selects uops from the instruction pool depending upon their status. If the status indicates that a uop has all of its operands then the dispatch unit checks to see if the execution resource needed by that uop is also available. If both are true, it removes that uop and sends it to the resource where it is executed. The results of the uop are later returned to the pool. There are five ports on the Reservation Station and the multiple resources are accessed as shown in Figure 5 below:

The Pentium Pro processor can schedule at a peak rate of 5 uops per clock, one to each resource port, but a sustained rate of 3 uops per clock is typical. The activity of this scheduling process is the quintessential out-of-order process; uops are dispatched to the execution resources strictly according to dataflow constraints and resource availability, without regard to the original ordering of the program.

Note that the actual algorithm employed by this execution-scheduling process is vitally important to performance. If only one uop per resource becomes data-ready per clock cycle, then there is no choice. But if several are available, which should it choose? It could choose randomly, or first-come-first-served. Ideally it would choose whichever uop would shorten the overall dataflow graph of the program being run. Since there is no way to really know that at run-time, it approximates by using a pseudo FIFO scheduling algorithm favoring back-to-back uops.

Note that many of the uops are branches, because many IA instructions are branches. The Branch Target Buffer will correctly predict most of these branches but it can’t correctly predict them all. Consider a BTB that’s correctly predicting the backward branch at the bottom of a loop: eventually that loop is going to terminate, and when it does, that branch will be mispredicted. Branch uops are tagged (in the in-order pipeline) with their fallthrough address and the destination that was predicted for them. When the branch executes, what the branch actually did is compared against what the prediction hardware said it would do. If those coincide, then the branch eventually retires, and most of the speculatively executed work behind it in the instruction pool is good.

But if they do not coincide (a branch was predicted as taken but fell through, or was predicted as not taken and it actually did take the branch) then the Jump Execution Unit (JEU) changes the status of all of the uops behind the branch to remove them from the instruction pool. In that case the proper branch destination is provided to the BTB which restarts the whole pipeline from the new target address.

Tour stop #3: The RETIRE unit

The retire unit is also checking the status of uops in the instruction pool – it is looking for uops that have executed and can be removed from the pool. Once removed, the uops’ original architectural target is written as per the original IA instruction. The retirement unit must not only notice which uops are complete, it must also re-impose the original program order on them. It must also do this in the face of interrupts, traps, faults, breakpoints and mis- predictions.

There are two clock cycles devoted to the retirement process. The retirement unit must first read the instruction pool to find the potential candidates for retirement and determine which of these candidates are next in the original program order. Then it writes the results of this cycle’s retirements to both the Instruction Pool and the RRF. The retirement unit is capable of retiring 3 uops per clock.

Tour stop #4: BUS INTERFACE unit

There are two types of memory access: loads and stores. Loads only need to specify the memory address to be accessed, the width of the data being retrieved, and the destination register. Loads are encoded into a single uop. Stores need to provide a memory address, a data width, and the data to be written. Stores therefore require two uops, one to generate the address, one to generate the data. These uops are scheduled independently to maximize their concurrency, but must re-combine in the store buffer for the store to complete.

Stores are never performed speculatively, there being no transparent way to undo them. Stores are also never re- ordered among themselves. The Store Buffer dispatches a store only when the store has both its address and its data, and there are no older stores awaiting dispatch.

What impact will a speculative core have on the real world? Early in the Pentium Pro processor project, we studied the importance of memory access reordering. The basic conclusions were as follows:

•Stores must be constrained from passing other stores, for only a small impact on performance.

•Stores can be constrained from passing loads, for an inconsequential performance loss.

•Constraining loads from passing other loads or from passing stores creates a significant impact on performance.

So what we need is a memory subsystem architecture that allows loads to pass stores. And we need to make it possible for loads to pass loads. The Memory Order Buffer (MOB) accomplishes this task by acting like a reservation station and Re-Order Buffer, in that it holds suspended loads and stores, redispatching them when the blocking condition (dependency or resource) disappears.

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by viagallery.com

I am not a processor, I am a random process

Image by kevindooley
I’ll often get comments on my film photos, "nice processing". Actually, I don’t do anything to my film shots except crop.

So the visual effect above is not created by me in some fit of artistic inspiration in Photoshop… as if!

Rather I apply a process that increases the "design space" of the image through a process that at every step introduces random change:

* use a cheap camera whose lenses and focus are imperfect
* use expensive film that super-saturates
* process the film in the wrong chemicals
* don’t look at what you’re shooting
* shoot out moving car
* put exposure on manual, which results in a random exposure time

Each element of randomness increases the number of things the picture might become. I just can’t tell ahead of time where it might end up.

Introduction:

When we are talking about dualcore processors , this question will appear in our mind that : What is the benefit of using from Dualcore processors? And With the growing of using of dual core processors, this question is more important than before. Will dual core processor be more useful for us?what is the advantages and disadvantages

of using dualcore processors? and what are the differences between Dualcore and dual processors?INTEL and AMD technology in dual core micro architecture. Which one is better?

I want to attempt in this paper to answer to these questions.

Definition of DualCore and compare with Dual Processor:

one of question for some users that they want to buy a high configuration system is if they want to have two processors in their computers. For video editing, huge graphic processing, multi-threading in applications, or a lot of multitasking the answer is positive. Then the second question becomes here: two separate processors or a single dual core processor ? Dual processor or Dual core ,which one is better for me?As we know computer manufacturers are trying to increasing the speed of processors.

However, size of duo, complexity and heat issues it has become increasingly difficult to make CPUs faster. To continue to improve performance, they reached to another solution. because having two Processors and of course one mainboard that support of hosting them is more expensive. Computer Architecture engineers created another

way: Using two Processors, Join them together in one chip. It can have the power and performance of two Processors but only one socket on the motherboard there is. This price will be cheaper , and allows for the power of two cores with a cost that is less than two separate Processors.

There are differences between brands mostly Intel and AMD that how they combined two cores in one chip, and the speeds they run each core that can directly affect how much is the performance from having a dual core Processor. Additionally, different types of programs get differing benefits and they use different types from dual core Processor that we will discuss about that in this research.

A dual core processor is exactly what that we say. It is two processor cores on one die

and like a dual processor system in one processor. AMD’s Opteron processor has been

dual processor capable since started. Opteron was designed with an extra HyperTransport link that we will discuss about that. HyperTransport Technology means a faster data connection that it can to transfer more data between two chips. It

doesn’t mean that the chip is faster by itself. It means this technology gives capability via the HyperTransport pathway for one chip to communication to another part.

As I explained a Dualcore Processor is a combination of two independent processors in a single package or a single integrated circuit (IC). A Dual Processor device contains two independent microprocessors and a quad core device contains four microprocessors as well. Cores in a Dualcore Processors will share a single coherent cache at the highest cache level that we say L2 Level cache, or may have

separate caches like current AMD dual-core processors. Each “core” independently

implements optimizations like: Fetching, Decoding, execution, pipelining, and

multithreading. A system with N cores is very useful when we have N or more threads at the same time . The technology is used in other technology areas in these days, especially those of embedded processors such as network processors In these

applications, multi-core processors with higher numbers of processing elements is using these days.

Section 2: Multi Processing

As a remind Multiprocessing is the using of two or more Processors in a computer system. OF course one of important issue is the ability of system for support more than one processor and the ability to allocate and divide the tasks between them.

Multiprocessing sometimes refers to the execution of various concurrent program processes in a system. However multiprogramming is very suitable to describe this concept, which is usually implemented in software, but multiprocessing is involve to describe the use of multiple Processors. Totally a system can be multiprocessing and multiprogramming , only one of them, or neither of them.

Section 3: Multi Thread Scheduling

One of question in Dualcore research is really how a computer knows when to use each core.The answer is that Operating system is responsible,because There is a part in the operating system that we call “scheduler” . Scheduler will order the Processor that which program should run at any time. This allows different programs can run at the same time, and processor can switch back between them if needed. When a lot of programs are running at the same time , a computer seems slow. If a dual-core

processor be available , the scheduler has twice Processor resource to work with that.

Normally this allows for some abilities like being able to run one core specifically for

a game, while using the other core to “background” things that keep the rest of the

system running. And sometimes both cores can work on the same program ,but if it designed to use advantage of dualcore that we call “multi-threaded”. However, it is important to note that if you are running a program and it is not “multi-threaded”, you will not get any benefit from more than one Processor or core.

Micro architecture of Processor resources divide to three types:

Replicated,Partitioned and shared.

Section 4 : Development

While manufacturing technology continues to improve, reducing the size of single gates become as a important issue. Some of this changing and physical limitations can create significant heat dissipation and data synchronization problems. The demand for more capable microprocessors with more efficiency causes CPU designers to use various methods of increasing performance. Some instruction-level parallelism (ILP) methods like pipelining are suitable for many applications, but they are not suitable for others. Many applications and programs are used to thread level parallelism(TLP) methods, and multiple independent CPUs is one method used to increase a system’s overall TLP. Increasing available space due to refined manufacturing processes and the demand for increased TLP are the most logic behind the creation of Dualcore Procesors.

Section 5: Two cores versus Sole core

There are three important definition and term that I want to explain about them in my

paper .pipeline, cache and bus. This is the most explanations of what is pipelining in CPU .

First we should know the data instruction set. A processor loads the instructions into a pipeline.It means The data will process sequentially one set after another set.

Shorter pipeline means that more job will be perform in pipeline per clock cycle.

However with a shorter pipeline the data will get faster balancing that is very important as well.This is the main reason that AMD can compete with higher clock INTEL processors.

If the processor needs to access and communicate with outside of the cache ,it should be through the bus to system RAM. Now if the CPU cache is running at the same clock speed as the processor itself. If it is a 3GHz processor then the speed limitation between cache and the processor is 3GHz. If the processor has to communicate and

reach out of the bus to main memory then it should comes slow down to that bus speed. I mean a bus speed of 600 MHz is five times slower than the 3GHz .

Section 6: Implementation

There are different ways between AMD and Intel dual-core technology. AMD claims that they had this plan the move to dual-core from 6 years ago.from that time the first Athlon64 and Opteron released. The benefit of the AMD technology is in the way that the two cores will communicate directly with each other. Intel in another side, put two of Pentium cores on the same chip, and if they need to communicate

with each other it has to perform through the mainboard.another issue is that Intel did not increase the speed of FSB or front-side-bus that as we know is the connection between the Processor and the mainboard.It shows they

switched to dual-core and it means that the processing power did double but the amount of bandwidth for each core did not. This issue a little create suspect on the Intel design, and some users believe that Intel prevents it from being as powerful as it can be. But Intel Designers continue to use faster system memory to keep information supplied to the processor cores. For example the highest-end Intel chip,

the Pentium Extreme Edition 955chip , it has a higher FSB speed, as well as having a larger 2MB per core cache memory and the ability to use Hyperthreading.

On the other hand AMD Company, didn’t use the old model of FSB. They use a new technology that we call HyperTransport to communicate with the Chipset and system memory, and they also moved the memory controller from the chipset to the

processor. By this new technology , AMD arrived to many advantage, especially with the move to dual-core processors. The latest generation of AMD solo core processor can use single channel or dual channel memory, but we should consider to that even though dual channel operation will double the memory speed, but it does not double

the actual memory performance for solo core processors. It shows that dual channel memory just provides more bandwidth than a solo processor core can use. However, with dual core processor all the extra bandwidth can be use.

Section 7: Advantages

In dual Processors at the same die have the cache coherency circuitry can that operate

much higher clock rate than is possible if the signals have to travel off-chip. It means

combining Two processors on a single die improves the performance of cache snoop or cache searching operations. That means the signals between different Processors travel shorter distances, those signals degrade less. These higher quality signals allow more data send and recieve in a specific time since individual signals can be shorter and do not need to repeat them.

Another issue is power consumption in hardware. A dualcore processor uses less power than two single-core processors or dual processors. The reason is that for increasing power required to drive signals external to the chip and because the smaller silicon process allows the cores to operate in lower voltages. The cores share some

circuitry, like the L2 cache and the interface to the front side bus (FSB).

Section 8: Disadvantages

As we learnt in Operating system and Computer Architecture totally Operating Systems try the best t use from available hardware for running the programs with maximize utilization mostly about Processor and RAM. Also, the ability of Dualcore processors to increase Software performance but it depends on the use of multiple

threads in application or program. For example, most of new video games will run faster on a 3 GHz singlecore processor than on a 2GHz dualcore processor in the the same core architecture. Because they are not capable of using more than one core at a time.

Another issue is about thermal. In a Dualcore Processor is more difficult to manage thermal than lower-density single chip processors. From an architectural point of view we can say sole core processor designs might be make better use of the silicon surface area than Dual processor design.in fact Two processing cores sharing in the same system bus and memory bandwidth will limit the real-world performance advantage. If a single core is close to being memory bandwidth limited, change to dual-core may only gives 30% to 65% improvement. And If memory bandwidth

doesn’t make any problem, till 90% improvement can be expected. It would be possible for a software or application that use from two processors for running faster on one dualcore processor if communication between the Processor was the limited by factor, which would count as more than 100% improvement.

Section 9: Power Consumption

As we know the policy of Intel company is to design not only fast processors but also very economical processors when they were attemping on the new Core architecture.

Therefore, they started new activity base on performance-per-watt. That’s why it is

interesting to look the power consumption of the new processors and compare it to the previous-generation processors based on older architecture.

For better conclusion I found a special utility to measure the maximum power consumption .It measured the current that goes through the CPU power circuitry. First , It measured the processors power consumption in idle mode.

The results are very diverse, as you can see, which is probably caused by too different

processor models participating. However, generally speaking, Core 2 Duo processors

can really boast the most economical performance in idle mode.

Section 10: Integral Characteristics of the Dual-Core Processors

Now I want to conclude my analysis of the new Intel processors performance and their features with those of other currently available dual-core CPUs with details for parameters that are indirectly connected with the performance rate.

For this reason , I decided to put an average performance chart for testing . We calculated this parameter as geometric mean of all normalized results obtained during this test session.

As we can see this chart again shows the better performance of the new Intel CPUs.

Athlon 64 Fx-62, can only compete with Core 2 Duo E6600, while Pentium Extreme Edition 965 cannot do competition even with Core 2 Duo E6400. From the performance view, Core 2 Extreme X6800, Core 2 Duo E6700 and Core 2 Duo E6600 on Intel Core microarchitecture won in this comparation.

Conclusion:

Actually we have made the most important conclusions about the performance,pricing and power consumption of DualCore Processors in this research. I just want to say once again that Intel company really did a great and excellent job with these processors on Core micro architecture.of course I don’t want to say that AMD lost this competition and market in the world. This company managed with different way

and policy for their technology and products.and as we know AMD let Intel take the high-end market, but the cheaper price of AMD causes the are still remind as a powerfull competitor for intel.Ans also let me say that Pentium D processor family that has lost quite a few of its

members will still remain in demand. Despite the high over heating and power consumption of the models in this family, they will still be a good choice for inexpensive or home systems.

As you can see, the move to dual-core is definitely a win for consumers. Since they

are more economy than dual processor computers, and they can give the same or better performance. It can be the standard for modern computer systems.

Done for a class thingy. Here is a quick history of Intel processors – The specs on each are hard to see so I put them below ^///^ Intel i286 – 12MHz Intel i386 – 25MHz Intel i486 DX – 33MHz Intel i486 DX2 – 66 and 80MHz Intel Pentium I – 75-200MHz Intel Pentium I with MMX – 133-300MHz…